Re: T3 failure Chuck <chuckconkling@yahoo.com> wrote:
> ROOT[1]: W: u1ctr SysFail reset (7001) was initiated at 20041005 225314
> Cache memory parity error detected
>
> This is leading me to believe that someone powered off the T3 array last
> night. Can anyone help verify this?
>
No, it means you've had a cache memory parity error.
In practice this error is actually wrong - the T3's have ECC memory,
so this actually means you've had an uncorrectable ECC memory error.
Scott. |