SEO

re
this counts the fp context switches on archs that do lazy switching.
later find a diff to vmstat...
please test on all archs.
cu
--
paranoic mickey (my employers have changed but, the name has remained)

Index: uvm/uvm_extern.h
================================================== =================
RCS file: /cvs/src/sys/uvm/uvm_extern.h,v
retrieving revision 1.54
diff -u -r1.54 uvm_extern.h
--- uvm/uvm_extern.h 30 Dec 2004 08:28:39 -0000 1.54
+++ uvm/uvm_extern.h 19 Apr 2005 18:16:39 -0000
@@ -358,6 +358,8 @@

/* kernel memory objects: managed by uvm_km_kmemalloc() only! */
struct uvm_object *kmem_object;
+
+ int fpswtch; /* FPU context switches */
};

#ifdef _KERNEL
Index: arch/alpha/alpha/trap.c
================================================== =================
RCS file: /cvs/src/sys/arch/alpha/alpha/trap.c,v
retrieving revision 1.44
diff -u -r1.44 trap.c
--- arch/alpha/alpha/trap.c 6 Dec 2004 20:12:21 -0000 1.44
+++ arch/alpha/alpha/trap.c 19 Apr 2005 18:16:39 -0000
@@ -757,6 +757,7 @@

p->p_addr->u_pcb.pcb_fpcpu = ci;
ci->ci_fpcurproc = p;
+ uvmexp.fpswtch++;

p->p_md.md_flags |= MDP_FPUSED;
alpha_pal_wrfen(1);
Index: arch/amd64/amd64/fpu.c
================================================== =================
RCS file: /cvs/src/sys/arch/amd64/amd64/fpu.c,v
retrieving revision 1.7
diff -u -r1.7 fpu.c
--- arch/amd64/amd64/fpu.c 28 Oct 2004 20:36:15 -0000 1.7
+++ arch/amd64/amd64/fpu.c 19 Apr 2005 18:16:39 -0000
@@ -207,9 +207,10 @@
* Initialize the FPU state to clear any exceptions. If someone else
* was using the FPU, save their state.
*/
- if (ci->ci_fpcurproc != NULL && ci->ci_fpcurproc != p)
+ if (ci->ci_fpcurproc != NULL && ci->ci_fpcurproc != p) {
fpusave_cpu(ci, 1);
- else {
+ uvmexp.fpswtch++;
+ } else {
clts();
fninit();
fwait();
Index: arch/hppa/hppa/genassym.cf
================================================== =================
RCS file: /cvs/src/sys/arch/hppa/hppa/genassym.cf,v
retrieving revision 1.26
diff -u -r1.26 genassym.cf
--- arch/hppa/hppa/genassym.cf 13 Jun 2004 21:49:14 -0000 1.26
+++ arch/hppa/hppa/genassym.cf 19 Apr 2005 18:16:39 -0000
@@ -157,6 +157,9 @@
struct uvm
member page_idle_zero

+struct uvmexp
+member fpswtch
+
# system calls
export SYSCALLGATE
export SYS_exit
Index: arch/hppa/hppa/locore.S
================================================== =================
RCS file: /cvs/src/sys/arch/hppa/hppa/locore.S,v
retrieving revision 1.149
diff -u -r1.149 locore.S
--- arch/hppa/hppa/locore.S 7 Apr 2005 00:24:57 -0000 1.149
+++ arch/hppa/hppa/locore.S 19 Apr 2005 18:16:40 -0000
@@ -132,8 +132,6 @@

.export kernelmapped, data
BSS(kernelmapped, 4) /* set when kernel is mapped */
- .export fpu_csw, data
- BSS(fpu_csw, 4) /* count fpu context switches */
.export fpu_curpcb, data
BSS(fpu_curpcb, 4) /* pcb of the fpu owner */
.export fpu_enable, data
@@ -1120,11 +1118,12 @@

$fpusw_nosave
/* count switches */
- ldil L%fpu_csw, r1
- ldw R%fpu_csw(r1), r16
+ .import uvmexp, data
+ ldil L%(uvmexp+FPSWTCH), r1
+ ldw R%(uvmexp+FPSWTCH)(r1), r16
ldo 31*8+PCB_FPREGS+U_PCB(r9), r17
ldo 1(r16), r16
- stw r16, R%fpu_csw(r1)
+ stw r16, R%(uvmexp+FPSWTCH)(r1)

fldds,ma -8(r17), fr31
fldds,ma -8(r17), fr30
Index: arch/hppa64/hppa64/genassym.cf
================================================== =================
RCS file: /cvs/src/sys/arch/hppa64/hppa64/genassym.cf,v
retrieving revision 1.1
diff -u -r1.1 genassym.cf
--- arch/hppa64/hppa64/genassym.cf 1 Apr 2005 10:40:47 -0000 1.1
+++ arch/hppa64/hppa64/genassym.cf 19 Apr 2005 18:16:40 -0000
@@ -135,6 +135,9 @@
struct uvm
member page_idle_zero

+struct uvmexp
+member fpswtch
+
# system calls
export SYSCALLGATE
export SYS_exit
Index: arch/hppa64/hppa64/locore.S
================================================== =================
RCS file: /cvs/src/sys/arch/hppa64/hppa64/locore.S,v
retrieving revision 1.1
diff -u -r1.1 locore.S
--- arch/hppa64/hppa64/locore.S 1 Apr 2005 10:40:47 -0000 1.1
+++ arch/hppa64/hppa64/locore.S 19 Apr 2005 18:16:40 -0000
@@ -61,8 +61,6 @@
BSS(emrg_stack, 8) /* stack for HPMC/TOC/PWRF */
BSS(fpemu_stack, 8) /* stack for FPU emulation */

- .export fpu_csw, data
- BSS(fpu_csw, 4) /* count fpu context switches */
.export fpu_enable, data
BSS(fpu_enable, 4) /* bits to set in the %cr10 to enable fpu */
.export fpu_curpcb, data
@@ -1008,11 +1044,12 @@

$fpusw_nosave
/* count switches */
- ldil L%fpu_csw, %r1
- ldw R%fpu_csw(%r1), %r16
+ .import umvexp, data
+ ldil L%(uvmexp+FPSWTCH), %r1
+ ldw R%(uvmexp+FPSWTCH)(%r1), %r16
ldo 31*8+PCB_FPREGS+U_PCB(%r9), %r17
ldo 1(%r16), %r16
- stw %r16, R%fpu_csw(%r1)
+ stw %r16, R%(uvmexp+FPSWTCH)(%r1)

fldds,ma -8(%r17), %fr31
fldds,ma -8(%r17), %fr30
Index: arch/hppa64/include/trap.h
================================================== =================
RCS file: /cvs/src/sys/arch/hppa64/include/trap.h,v
retrieving revision 1.1
diff -u -r1.1 trap.h
--- arch/hppa64/include/trap.h 1 Apr 2005 10:40:48 -0000 1.1
+++ arch/hppa64/include/trap.h 19 Apr 2005 18:16:40 -0000
@@ -65,9 +65,9 @@
/*
* Various trap frame flags.
*/
-#define TFF_LAST_POS 40
-#define TFF_SYS_POS 41
-#define TFF_INTR_POS 42
+#define TFF_LAST_POS 50
+#define TFF_SYS_POS 51
+#define TFF_INTR_POS 52

#define TFF_LAST (1 << (63 - TFF_LAST_POS))
#define TFF_SYS (1 << (63 - TFF_SYS_POS))
Index: arch/i386/isa/npx.c
================================================== =================
RCS file: /cvs/src/sys/arch/i386/isa/npx.c,v
retrieving revision 1.35
diff -u -r1.35 npx.c
--- arch/i386/isa/npx.c 21 Oct 2004 20:58:07 -0000 1.35
+++ arch/i386/isa/npx.c 19 Apr 2005 18:16:41 -0000
@@ -698,6 +698,7 @@
ci->ci_fpcurproc = p;
p->p_addr->u_pcb.pcb_fpcpu = ci;
splx(s);
+ uvmexp.fpswtch++;

if ((p->p_md.md_flags & MDP_USEDFPU) == 0) {
fldcw(&p->p_addr->u_pcb.pcb_savefpu.sv_87.sv_env.en_cw);
Index: arch/powerpc/powerpc/trap.c
================================================== =================
RCS file: /cvs/src/sys/arch/powerpc/powerpc/trap.c,v
retrieving revision 1.66
diff -u -r1.66 trap.c
--- arch/powerpc/powerpc/trap.c 17 Apr 2005 21:34:26 -0000 1.66
+++ arch/powerpc/powerpc/trap.c 19 Apr 2005 18:16:41 -0000
@@ -525,6 +525,7 @@
if (fpuproc)
save_fpu(fpuproc);
fpuproc = p;
+ uvmexp.fpswtch++;
enable_fpu(p);
break;

Index: arch/sparc/sparc/trap.c
================================================== =================
RCS file: /cvs/src/sys/arch/sparc/sparc/trap.c,v
retrieving revision 1.43
diff -u -r1.43 trap.c
--- arch/sparc/sparc/trap.c 17 Apr 2005 18:47:51 -0000 1.43
+++ arch/sparc/sparc/trap.c 19 Apr 2005 18:16:41 -0000
@@ -417,6 +417,7 @@
savefpstate(cpuinfo.fpproc->p_md.md_fpstate);
loadfpstate(fs);
cpuinfo.fpproc = p; /* now we do have it */
+ uvmexp.fpswtch++;
}
tf->tf_psr |= PSR_EF;
break;
Index: arch/sparc64/sparc64/trap.c
================================================== =================
RCS file: /cvs/src/sys/arch/sparc64/sparc64/trap.c,v
retrieving revision 1.34
diff -u -r1.34 trap.c
--- arch/sparc64/sparc64/trap.c 29 Mar 2005 19:34:07 -0000 1.34
+++ arch/sparc64/sparc64/trap.c 19 Apr 2005 18:16:42 -0000
@@ -599,6 +599,7 @@
savefpstate(fpproc->p_md.md_fpstate);
loadfpstate(fs);
fpproc = p; /* now we do have it */
+ uvmexp.fpswtch++;
}
tf->tf_tstate |= (PSTATE_PEF<<TSTATE_PSTATE_SHIFT);
break;









Index: vmstat.c
================================================== =================
RCS file: /cvs/src/usr.bin/vmstat/vmstat.c,v
retrieving revision 1.94
diff -u -r1.94 vmstat.c
--- vmstat.c 24 Dec 2004 22:38:22 -0000 1.94
+++ vmstat.c 19 Apr 2005 18:26:35 -0000
@@ -565,6 +565,7 @@
(void)printf("%11u traps\n", uvmexp.traps);
(void)printf("%11u interrupts\n", uvmexp.intrs);
(void)printf("%11u cpu context switches\n", uvmexp.swtch);
+ (void)printf("%11u fpu context switches\n", uvmexp.fpswtch);
(void)printf("%11u software interrupts\n", uvmexp.softs);
(void)printf("%11u syscalls\n", uvmexp.syscalls);
(void)printf("%11u pagein operations\n", uvmexp.pageins);