SEO

hi!

this diff adds agp support for the i965GM mobile graphics chipset as
found in recent centrino laptops (like my ThinkPad T61). it also adds
some bits to the i810(4) X.org "xenocara" driver in our tree.

vga1 at pci0 dev 2 function 0 "Intel 82965GM Video" rev 0x0c: aperture at 0xe0000000, size 0x8000000

please test this diff if you have a i965G, i965GM, or any older and
already supported i915, i855, i830 or even i810 chipset.

how to test:
- checkout src/ and xenocara/ from cvs.
- patch from the toplevel directory, the patch includes src/ and xenocara/
- build and install a new kernel (if you're using amd64, you have to
enable "option PCIAGP" in src/sys/arch/amd64/conf/GENERIC)
- cd into xenocara/driver/xf86-video-intel and run
make -f Makefile.bsd-wrapper cleandir obj all install
(you don't need to run a complete xenocara build)

after installing the new kernel and xorg driver the xserver should
just run as i810 without any xorg.conf configuration file.

i'm using the following dual-head xinerama configuration:
http://team.vantronix.net/~reyk/xorg.conf.t61

reyk

Index: src/sys/dev/pci/agp.c
================================================== =================
RCS file: /cvs/src/sys/dev/pci/agp.c,v
retrieving revision 1.5
diff -u -p -r1.5 agp.c
--- src/sys/dev/pci/agp.c 30 Jan 2007 21:12:14 -0000 1.5
+++ src/sys/dev/pci/agp.c 26 Jul 2007 10:34:50 -0000
@@ -350,14 +350,14 @@ pciagp_set_pchb(struct pci_attach_args *
}

int
-agp_map_aperture(struct vga_pci_softc *sc)
+agp_map_aperture(struct vga_pci_softc *sc, u_int32_t bar, u_int32_t memtype)
{
/*
* Find and the aperture. Don't map it (yet), this would
* eat KVA.
*/
- if (pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, AGP_APBASE,
- PCI_MAPREG_TYPE_MEM, &sc->sc_apaddr, &sc->sc_apsize,
+ if (pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, bar,
+ memtype, &sc->sc_apaddr, &sc->sc_apsize,
&sc->sc_apflags) != 0)
return ENXIO;

Index: src/sys/dev/pci/agp_ali.c
================================================== =================
RCS file: /cvs/src/sys/dev/pci/agp_ali.c,v
retrieving revision 1.2
diff -u -p -r1.2 agp_ali.c
--- src/sys/dev/pci/agp_ali.c 25 Jul 2002 23:31:04 -0000 1.2
+++ src/sys/dev/pci/agp_ali.c 26 Jul 2007 10:34:50 -0000
@@ -90,7 +90,7 @@ agp_ali_attach(struct vga_pci_softc *sc,
sc->sc_chipc = asc;
sc->sc_methods = &agp_ali_methods;

- if (agp_map_aperture(sc) != 0) {
+ if (agp_map_aperture(sc, AGP_APBASE, PCI_MAPREG_TYPE_MEM) != 0) {
printf(": failed to map aperture\n");
free(asc, M_DEVBUF);
return (ENXIO);
Index: src/sys/dev/pci/agp_amd.c
================================================== =================
RCS file: /cvs/src/sys/dev/pci/agp_amd.c,v
retrieving revision 1.2
diff -u -p -r1.2 agp_amd.c
--- src/sys/dev/pci/agp_amd.c 25 Jul 2002 23:31:04 -0000 1.2
+++ src/sys/dev/pci/agp_amd.c 26 Jul 2007 10:34:51 -0000
@@ -178,7 +178,7 @@ agp_amd_attach(struct vga_pci_softc *sc,
return (error);
}

- if (agp_map_aperture(sc) != 0) {
+ if (agp_map_aperture(sc, AGP_APBASE, PCI_MAPREG_TYPE_MEM) != 0) {
printf(": can't map aperture\n");
agp_generic_detach(sc);
free(asc, M_DEVBUF);
Index: src/sys/dev/pci/agp_i810.c
================================================== =================
RCS file: /cvs/src/sys/dev/pci/agp_i810.c,v
retrieving revision 1.14
diff -u -p -r1.14 agp_i810.c
--- src/sys/dev/pci/agp_i810.c 30 Dec 2006 19:14:55 -0000 1.14
+++ src/sys/dev/pci/agp_i810.c 26 Jul 2007 10:34:52 -0000
@@ -55,20 +55,15 @@
#define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v)
#define WRITEGTT(off,v) bus_space_write_4(isc->gtt_bst, isc->gtt_bsh, off, v)

-#define CHIP_I810 0 /* i810/i815 */
-#define CHIP_I830 1 /* i830/i845 */
-#define CHIP_I855 2 /* i852GM/i855GM/i865G */
-#define CHIP_I915 3 /* i915G/i915GM */
-
-#define WRITE_GATT(off,v) \
- do { \
- if (isc->chiptype == CHIP_I915) \
- WRITEGTT((u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \
- v); \
- else \
- WRITE4(AGP_I810_GTT + \
- (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, v); \
- } while (0)
+#define WRITE_GATT(off, v) agp_i810_write_gatt(isc, off, v)
+
+enum {
+ CHIP_I810 = 0, /* i810/i815 */
+ CHIP_I830 = 1, /* i830/i845 */
+ CHIP_I855 = 2, /* i852GM/i855GM/i865G */
+ CHIP_I915 = 3, /* i915G/i915GM */
+ CHIP_I965 = 4 /* i965/i965GM */
+};

struct agp_i810_softc {
struct agp_gatt *gatt;
@@ -78,6 +73,7 @@ struct agp_i810_softc {
for stolen memory */
bus_space_tag_t bst; /* bus_space tag */
bus_space_handle_t bsh; /* bus_space handle */
+ bus_size_t bsz; /* bus_space size */
bus_space_tag_t gtt_bst; /* GATT bus_space tag */
bus_space_handle_t gtt_bsh; /* GATT bus_space handle */
struct pci_attach_args bridge_pa;
@@ -95,6 +91,7 @@ int agp_i810_free_memory(struct vga_pci_
int agp_i810_bind_memory(struct vga_pci_softc *, struct agp_memory *,
off_t);
int agp_i810_unbind_memory(struct vga_pci_softc *, struct agp_memory *);
+void agp_i810_write_gatt(struct agp_i810_softc *, bus_size_t, u_int32_t);

struct agp_methods agp_i810_methods = {
agp_i810_get_aperture,
@@ -115,7 +112,9 @@ agp_i810_attach(struct vga_pci_softc *sc
{
struct agp_i810_softc *isc;
struct agp_gatt *gatt;
+ bus_addr_t mmaddr, gmaddr;
int error;
+ u_int memtype = 0;

isc = malloc(sizeof *isc, M_DEVBUF, M_NOWAIT);
if (isc == NULL) {
@@ -127,12 +126,6 @@ agp_i810_attach(struct vga_pci_softc *sc
sc->sc_methods = &agp_i810_methods;
memcpy(&isc->bridge_pa, pchb_pa, sizeof *pchb_pa);

- if ((error = agp_map_aperture(sc))) {
- printf(": can't map aperture\n");
- free(isc, M_DEVBUF);
- return (error);
- }
-
switch (PCI_PRODUCT(pa->pa_id)) {
case PCI_PRODUCT_INTEL_82810_GC:
case PCI_PRODUCT_INTEL_82810_DC100_GC:
@@ -154,18 +147,44 @@ agp_i810_attach(struct vga_pci_softc *sc
case PCI_PRODUCT_INTEL_82945GM_IGD:
isc->chiptype = CHIP_I915;
break;
+ case PCI_PRODUCT_INTEL_82965_IGD_1:
+ case PCI_PRODUCT_INTEL_82965GM_IGD_1:
+ isc->chiptype = CHIP_I965;
+ break;
}

- error = pci_mapreg_map(pa,
- (isc->chiptype == CHIP_I915) ? AGP_I915_MMADR : AGP_I810_MMADR,
- PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, NULL, NULL, 0);
+ switch (isc->chiptype) {
+ case CHIP_I915:
+ gmaddr = AGP_I915_GMADR;
+ mmaddr = AGP_I915_MMADR;
+ break;
+ case CHIP_I965:
+ gmaddr = AGP_I965_GMADR;
+ mmaddr = AGP_I965_MMADR;
+ memtype = PCI_MAPREG_MEM_TYPE_64BIT;
+ break;
+ default:
+ gmaddr = AGP_APBASE;
+ mmaddr = AGP_I810_MMADR;
+ break;
+ }
+
+ error = agp_map_aperture(sc, gmaddr, memtype);
+ if (error != 0) {
+ printf(": can't map aperture\n");
+ free(isc, M_DEVBUF);
+ return (error);
+ }
+
+ error = pci_mapreg_map(pa, mmaddr, memtype, 0,
+ &isc->bst, &isc->bsh, NULL, &isc->bsz, 0);
if (error != 0) {
printf(": can't map mmadr registers\n");
return (error);
}

if (isc->chiptype == CHIP_I915) {
- error = pci_mapreg_map(pa, AGP_I915_GTTADR, PCI_MAPREG_TYPE_MEM,
+ error = pci_mapreg_map(pa, AGP_I915_GTTADR, memtype,
0, &isc->gtt_bst, &isc->gtt_bsh, NULL, NULL, 0);
if (error != 0) {
printf(": can't map gatt registers\n");
@@ -296,6 +315,77 @@ agp_i810_attach(struct vga_pci_softc *sc
WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);

gatt->ag_physical = pgtblctl & ~1;
+ } else if (isc->chiptype == CHIP_I965) {
+ pcireg_t reg;
+ u_int32_t pgtblctl;
+ u_int16_t gcc1;
+ u_int32_t gttsize;
+
+ switch (READ4(AGP_I810_PGTBL_CTL) &
+ AGP_I810_PGTBL_SIZE_MASK) {
+ case AGP_I810_PGTBL_SIZE_512KB:
+ gttsize = 512 + 4;
+ break;
+ case AGP_I810_PGTBL_SIZE_256KB:
+ gttsize = 256 + 4;
+ break;
+ case AGP_I810_PGTBL_SIZE_128KB:
+ default:
+ gttsize = 128 + 4;
+ break;
+ }
+
+ reg = pci_conf_read(isc->bridge_pa.pa_pc,
+ isc->bridge_pa.pa_tag, AGP_I855_GCC1);
+ gcc1 = (u_int16_t)(reg >> 16);
+ switch (gcc1 & AGP_I855_GCC1_GMS) {
+ case AGP_I855_GCC1_GMS_STOLEN_1M:
+ isc->stolen = (1024 - gttsize) * 1024 / 4096;
+ break;
+ case AGP_I855_GCC1_GMS_STOLEN_4M:
+ isc->stolen = (4096 - gttsize) * 1024 / 4096;
+ break;
+ case AGP_I855_GCC1_GMS_STOLEN_8M:
+ isc->stolen = (8192 - gttsize) * 1024 / 4096;
+ break;
+ case AGP_I855_GCC1_GMS_STOLEN_16M:
+ isc->stolen = (16384 - gttsize) * 1024 / 4096;
+ break;
+ case AGP_I855_GCC1_GMS_STOLEN_32M:
+ isc->stolen = (32768 - gttsize) * 1024 / 4096;
+ break;
+ case AGP_I915_GCC1_GMS_STOLEN_48M:
+ isc->stolen = (49152 - gttsize) * 1024 / 4096;
+ break;
+ case AGP_I915_GCC1_GMS_STOLEN_64M:
+ isc->stolen = (65536 - gttsize) * 1024 / 4096;
+ break;
+ case AGP_G33_GCC1_GMS_STOLEN_128M:
+ isc->stolen = (131072 - gttsize) * 1024 / 4096;
+ break;
+ case AGP_G33_GCC1_GMS_STOLEN_256M:
+ isc->stolen = (262144 - gttsize) * 1024 / 4096;
+ break;
+ default:
+ isc->stolen = 0;
+ printf(": unknown memory configuration 0x%x, "
+ "disabling\n", reg);
+ agp_generic_detach(sc);
+ return (EINVAL);
+ }
+#ifdef DEBUG
+ if (isc->stolen > 0) {
+ printf(": detected %dk stolen memory",
+ isc->stolen * 4);
+ }
+#endif
+
+ /* GATT address is already in there, make sure it's enabled */
+ pgtblctl = READ4(AGP_I810_PGTBL_CTL);
+ pgtblctl |= 1;
+ WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
+
+ gatt->ag_physical = pgtblctl & ~1;
} else { /* CHIP_I855 */
/* The 855GM automatically initializes the 128k gatt on boot. */
pcireg_t reg;
@@ -386,9 +476,21 @@ agp_i810_get_aperture(struct vga_pci_sof
} else {
return (256 * 1024 * 1024);
}
- } else { /* CHIP_I855 */
- return (128 * 1024 * 1024);
+ } else if (isc->chiptype == CHIP_I965) {
+ reg = pci_conf_read(isc->bridge_pa.pa_pc,
+ isc->bridge_pa.pa_tag, AGP_I965_MSAC);
+ switch (reg & AGP_I965_MSAC_GMASIZE) {
+ case AGP_I965_MSAC_GMASIZE_128:
+ return (128 * 1024 * 1024);
+ case AGP_I965_MSAC_GMASIZE_256:
+ return (256 * 1024 * 1024);
+ case AGP_I965_MSAC_GMASIZE_512:
+ return (512 * 1024 * 1024);
+ }
}
+
+ /* CHIP_I855 */
+ return (128 * 1024 * 1024);
}

int
@@ -458,6 +560,26 @@ agp_i810_set_aperture(struct vga_pci_sof
reg |= AGP_I915_MSAC_GMASIZE_256;
pci_conf_write(isc->bridge_pa.pa_pc,
isc->bridge_pa.pa_tag, AGP_I915_MSAC, reg);
+ } else if (isc->chiptype == CHIP_I965) {
+ reg = pci_conf_read(isc->bridge_pa.pa_pc,
+ isc->bridge_pa.pa_tag, AGP_I965_MSAC);
+ reg &= ~AGP_I965_MSAC_GMASIZE;
+ switch (aperture) {
+ case (128 * 1024 * 1024):
+ reg |= AGP_I965_MSAC_GMASIZE_128;
+ break;
+ case (256 * 1024 * 1024):
+ reg |= AGP_I965_MSAC_GMASIZE_256;
+ break;
+ case (512 * 1024 * 1024):
+ reg |= AGP_I965_MSAC_GMASIZE_512;
+ break;
+ default:
+ printf("agp: bad aperture size %d\n", aperture);
+ return (EINVAL);
+ }
+ pci_conf_write(isc->bridge_pa.pa_pc,
+ isc->bridge_pa.pa_tag, AGP_I965_MSAC, reg);
} else { /* CHIP_I855 */
if (aperture != (128 * 1024 * 1024)) {
printf("agp: bad aperture size %d\n", aperture);
@@ -491,7 +613,7 @@ agp_i810_bind_page(struct vga_pci_softc
}
}

- WRITE_GATT(offset, physical | 1);
+ WRITE_GATT(offset, physical);
return (0);
}

@@ -642,7 +764,7 @@ agp_i810_bind_memory(struct vga_pci_soft

if (mem->am_type == 2) {
for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
- WRITE_GATT(offset + i, (mem->am_physical + i) | 1);
+ WRITE_GATT(offset + i, mem->am_physical + i);
}
mem->am_offset = offset;
mem->am_is_bound = 1;
@@ -688,4 +810,23 @@ agp_i810_unbind_memory(struct vga_pci_so
WRITE4(AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, 0);
mem->am_is_bound = 0;
return (0);
+}
+
+void
+agp_i810_write_gatt(struct agp_i810_softc *isc, bus_size_t off, u_int32_t v)
+{
+ u_int32_t d;
+
+
+ d = v | 1;
+
+ if (isc->chiptype == CHIP_I915)
+ WRITEGTT((u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, v ? d : 0);
+ else if (isc->chiptype == CHIP_I965) {
+ d |= (v & 0x0000000f00000000ULL) >> 28;
+ WRITE4(AGP_I965_GTT +
+ (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, v ? d : 0);
+ } else
+ WRITE4(AGP_I810_GTT +
+ (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, v ? d : 0);
}
Index: src/sys/dev/pci/agp_intel.c
================================================== =================
RCS file: /cvs/src/sys/dev/pci/agp_intel.c,v
retrieving revision 1.3
diff -u -p -r1.3 agp_intel.c
--- src/sys/dev/pci/agp_intel.c 1 Oct 2004 04:08:46 -0000 1.3
+++ src/sys/dev/pci/agp_intel.c 26 Jul 2007 10:34:52 -0000
@@ -92,7 +92,7 @@ agp_intel_attach(struct vga_pci_softc *s
sc->sc_methods = &agp_intel_methods;
sc->sc_chipc = isc;

- if (agp_map_aperture(sc) != 0) {
+ if (agp_map_aperture(sc, AGP_APBASE, PCI_MAPREG_TYPE_MEM) != 0) {
printf(": can't map aperture\n");
free(isc, M_DEVBUF);
sc->sc_chipc = NULL;
Index: src/sys/dev/pci/agp_sis.c
================================================== =================
RCS file: /cvs/src/sys/dev/pci/agp_sis.c,v
retrieving revision 1.2
diff -u -p -r1.2 agp_sis.c
--- src/sys/dev/pci/agp_sis.c 25 Jul 2002 23:31:04 -0000 1.2
+++ src/sys/dev/pci/agp_sis.c 26 Jul 2007 10:34:52 -0000
@@ -89,7 +89,7 @@ agp_sis_attach(struct vga_pci_softc *sc,
sc->sc_methods = &agp_sis_methods;
sc->sc_chipc = ssc;

- if (agp_map_aperture(sc) != 0) {
+ if (agp_map_aperture(sc, AGP_APBASE, PCI_MAPREG_TYPE_MEM) != 0) {
printf(": can't map aperture\n");
free(ssc, M_DEVBUF);
return (ENXIO);
Index: src/sys/dev/pci/agp_via.c
================================================== =================
RCS file: /cvs/src/sys/dev/pci/agp_via.c,v
retrieving revision 1.2
diff -u -p -r1.2 agp_via.c
--- src/sys/dev/pci/agp_via.c 25 Jul 2002 23:31:04 -0000 1.2
+++ src/sys/dev/pci/agp_via.c 26 Jul 2007 10:34:52 -0000
@@ -89,7 +89,7 @@ agp_via_attach(struct vga_pci_softc *sc,
sc->sc_chipc = asc;
sc->sc_methods = &agp_via_methods;

- if (agp_map_aperture(sc) != 0) {
+ if (agp_map_aperture(sc, AGP_APBASE, PCI_MAPREG_TYPE_MEM) != 0) {
printf(": can't map aperture\n");
free(asc, M_DEVBUF);
return (ENXIO);
Index: src/sys/dev/pci/agpreg.h
================================================== =================
RCS file: /cvs/src/sys/dev/pci/agpreg.h,v
retrieving revision 1.6
diff -u -p -r1.6 agpreg.h
--- src/sys/dev/pci/agpreg.h 11 Feb 2006 21:15:21 -0000 1.6
+++ src/sys/dev/pci/agpreg.h 26 Jul 2007 10:34:53 -0000
@@ -148,11 +148,15 @@
/*
* Memory mapped register offsets for i810 chipset.
*/
-#define AGP_I810_PGTBL_CTL 0x2020
-#define AGP_I810_DRT 0x3000
-#define AGP_I810_DRT_UNPOPULATED 0x00
-#define AGP_I810_DRT_POPULATED 0x01
-#define AGP_I810_GTT 0x10000
+#define AGP_I810_PGTBL_CTL 0x2020
+#define AGP_I810_PGTBL_SIZE_MASK 0x0000000e
+#define AGP_I810_PGTBL_SIZE_512KB (0 << 1)
+#define AGP_I810_PGTBL_SIZE_256KB (1 << 1)
+#define AGP_I810_PGTBL_SIZE_128KB (2 << 1)
+#define AGP_I810_DRT 0x3000
+#define AGP_I810_DRT_UNPOPULATED 0x00
+#define AGP_I810_DRT_POPULATED 0x01
+#define AGP_I810_GTT 0x10000

/*
* Config registers for i830MG device 0
@@ -162,7 +166,7 @@
#define AGP_I830_GCC1_DEV2 0x08
#define AGP_I830_GCC1_DEV2_ENABLED 0x00
#define AGP_I830_GCC1_DEV2_DISABLED 0x08
-#define AGP_I830_GCC1_GMS 0x70
+#define AGP_I830_GCC1_GMS 0xf0
#define AGP_I830_GCC1_GMS_STOLEN_512 0x20
#define AGP_I830_GCC1_GMS_STOLEN_1024 0x30
#define AGP_I830_GCC1_GMS_STOLEN_8192 0x40
@@ -202,5 +206,23 @@
#define AGP_I915_MSAC_GMASIZE 0x02
#define AGP_I915_MSAC_GMASIZE_128 0x02
#define AGP_I915_MSAC_GMASIZE_256 0x00
+
+/*
+ * G965 registers
+ */
+#define AGP_I965_GMADR 0x18
+#define AGP_I965_MMADR 0x10
+#define AGP_I965_MSAC 0x62
+#define AGP_I965_MSAC_GMASIZE 0x06
+#define AGP_I965_MSAC_GMASIZE_128 0x00
+#define AGP_I965_MSAC_GMASIZE_256 0x02
+#define AGP_I965_MSAC_GMASIZE_512 0x06
+#define AGP_I965_GTT 0x80000
+
+/*
+ * G33 registers
+ */
+#define AGP_G33_GCC1_GMS_STOLEN_128M 0x80
+#define AGP_G33_GCC1_GMS_STOLEN_256M 0x90

#endif /* !_PCI_AGPREG_H_ */
Index: src/sys/dev/pci/agpvar.h
================================================== =================
RCS file: /cvs/src/sys/dev/pci/agpvar.h,v
retrieving revision 1.5
diff -u -p -r1.5 agpvar.h
--- src/sys/dev/pci/agpvar.h 26 Nov 2006 18:35:51 -0000 1.5
+++ src/sys/dev/pci/agpvar.h 26 Jul 2007 10:34:53 -0000
@@ -89,7 +89,7 @@ struct agp_gatt {
*/

int agp_find_caps(pci_chipset_tag_t, pcitag_t);
-int agp_map_aperture(struct vga_pci_softc *);
+int agp_map_aperture(struct vga_pci_softc *, u_int32_t, u_int32_t);
struct agp_gatt *
agp_alloc_gatt(struct vga_pci_softc *);
void agp_free_gatt(struct vga_pci_softc *, struct agp_gatt *);
Index: src/sys/arch/amd64/pci/agp_machdep.c
================================================== =================
RCS file: /cvs/src/sys/arch/amd64/pci/agp_machdep.c,v
retrieving revision 1.1
diff -u -p -r1.1 agp_machdep.c
--- src/sys/arch/amd64/pci/agp_machdep.c 29 May 2007 22:27:14 -0000 1.1
+++ src/sys/arch/amd64/pci/agp_machdep.c 26 Jul 2007 10:34:53 -0000
@@ -41,6 +41,8 @@ const struct agp_product agp_products[]
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_IGD, agp_i810_attach },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945G_IGD_1, agp_i810_attach },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GM_IGD, agp_i810_attach },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965_IGD_1, agp_i810_attach },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GM_IGD_1, agp_i810_attach },
{ 0, 0, NULL }
};

Index: src/sys/arch/i386/pci/agp_machdep.c
================================================== =================
RCS file: /cvs/src/sys/arch/i386/pci/agp_machdep.c,v
retrieving revision 1.7
diff -u -p -r1.7 agp_machdep.c
--- src/sys/arch/i386/pci/agp_machdep.c 15 May 2006 08:27:19 -0000 1.7
+++ src/sys/arch/i386/pci/agp_machdep.c 26 Jul 2007 10:34:53 -0000
@@ -51,6 +51,8 @@ const struct agp_product agp_products[]
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_IGD, agp_i810_attach },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945G_IGD_1, agp_i810_attach },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GM_IGD, agp_i810_attach },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965_IGD_1, agp_i810_attach },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GM_IGD_1, agp_i810_attach },
{ PCI_VENDOR_INTEL, -1, agp_intel_attach },
{ PCI_VENDOR_SIS, -1, agp_sis_attach },
{ PCI_VENDOR_VIATECH, -1, agp_via_attach },
Index: xenocara/driver/xf86-video-intel/src/common.h
================================================== =================
RCS file: /cvs/xenocara/driver/xf86-video-intel/src/common.h,v
retrieving revision 1.1.1.1
diff -u -p -r1.1.1.1 common.h
--- xenocara/driver/xf86-video-intel/src/common.h 26 Nov 2006 20:06:38 -0000 1.1.1.1
+++ xenocara/driver/xf86-video-intel/src/common.h 26 Jul 2007 10:38:13 -0000
@@ -301,6 +301,11 @@ extern int I810_DEBUG;
#define PCI_CHIP_I946_GZ_BRIDGE 0x2970
#endif

+#ifndef PCI_CHIP_I965_GM
+#define PCI_CHIP_I965_GM 0x2A02
+#define PCI_CHIP_I965_GM_BRIDGE 0x2A00
+#endif
+
#define IS_I810(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I810 || \
pI810->PciInfo->chipType == PCI_CHIP_I810_DC100 || \
pI810->PciInfo->chipType == PCI_CHIP_I810_E)
@@ -317,9 +322,11 @@ extern int I810_DEBUG;
#define IS_I945G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_G)
#define IS_I945GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_GM)
#define IS_I965G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_G || pI810->PciInfo->chipType == PCI_CHIP_I965_G_1 || pI810->PciInfo->chipType == PCI_CHIP_I965_Q || pI810->PciInfo->chipType == PCI_CHIP_I946_GZ)
-#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810))
+#define IS_I965GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_GM)
+#define IS_I96X(pI810) (IS_I965G(pI810) || IS_I965GM(pI810))
+#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810) || IS_I965GM(pI810))

-#define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810))
+#define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810) || IS_I965GM(pI810))

#define GTT_PAGE_SIZE KB(4)
#define ROUND_TO(x, y) (((x) + (y) - 1) / (y) * (y))
Index: xenocara/driver/xf86-video-intel/src/i810_driver.c
================================================== =================
RCS file: /cvs/xenocara/driver/xf86-video-intel/src/i810_driver.c,v
retrieving revision 1.1.1.2
diff -u -p -r1.1.1.2 i810_driver.c
--- xenocara/driver/xf86-video-intel/src/i810_driver.c 16 Dec 2006 21:01:44 -0000 1.1.1.2
+++ xenocara/driver/xf86-video-intel/src/i810_driver.c 26 Jul 2007 10:38:20 -0000
@@ -144,6 +144,7 @@ static SymTabRec I810Chipsets[] = {
{PCI_CHIP_I965_G_1, "965G"},
{PCI_CHIP_I965_Q, "965Q"},
{PCI_CHIP_I946_GZ, "946GZ"},
+ {PCI_CHIP_I965_GM, "965GM"},
{-1, NULL}
};

@@ -167,6 +168,7 @@ static PciChipsets I810PciChipsets[] = {
{PCI_CHIP_I965_G_1, PCI_CHIP_I965_G_1, RES_SHARED_VGA},
{PCI_CHIP_I965_Q, PCI_CHIP_I965_Q, RES_SHARED_VGA},
{PCI_CHIP_I946_GZ, PCI_CHIP_I946_GZ, RES_SHARED_VGA},
+ {PCI_CHIP_I965_GM, PCI_CHIP_I965_GM, RES_SHARED_VGA},
{-1, -1, RES_UNDEFINED }
};

@@ -595,6 +597,7 @@ I810Probe(DriverPtr drv, int flags)
case PCI_CHIP_I965_G_1:
case PCI_CHIP_I965_Q:
case PCI_CHIP_I946_GZ:
+ case PCI_CHIP_I965_GM:
xf86SetEntitySharable(usedChips[i]);

/* Allocate an entity private if necessary */
Index: xenocara/driver/xf86-video-intel/src/i830_accel.c
================================================== =================
RCS file: /cvs/xenocara/driver/xf86-video-intel/src/i830_accel.c,v
retrieving revision 1.1.1.1
diff -u -p -r1.1.1.1 i830_accel.c
--- xenocara/driver/xf86-video-intel/src/i830_accel.c 26 Nov 2006 20:06:46 -0000 1.1.1.1
+++ xenocara/driver/xf86-video-intel/src/i830_accel.c 26 Jul 2007 10:38:24 -0000
@@ -148,7 +148,7 @@ I830Sync(ScrnInfoPtr pScrn)

if (pI830->entityPrivate && !pI830->entityPrivate->RingRunning) return;

- if (IS_I965G(pI830))
+ if (IS_I96X(pI830))
flags = 0;

/* Send a flush instruction and then wait till the ring is empty.
@@ -175,7 +175,7 @@ I830EmitFlush(ScrnInfoPtr pScrn)
I830Ptr pI830 = I830PTR(pScrn);
int flags = MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE;

- if (IS_I965G(pI830))
+ if (IS_I96X(pI830))
flags = 0;

BEGIN_LP_RING(2);
@@ -403,7 +403,7 @@ CheckTiling(ScrnInfoPtr pScrn)
unsigned int tiled = 0;

/* Check tiling */
- if (IS_I965G(pI830)) {
+ if (IS_I96X(pI830)) {
if (pI830->bufferOffset == pScrn->fbOffset && pI830->front_tiled == FENCE_XMAJOR)
tiled = 1;
if (pI830->bufferOffset == pI830->RotatedMem.Start && pI830->rotated_tiled == FENCE_XMAJOR)
@@ -475,7 +475,7 @@ I830SubsequentSolidFillRect(ScrnInfoPtr
ADVANCE_LP_RING();
}

- if (IS_I965G(pI830))
+ if (IS_I96X(pI830))
I830EmitFlush(pScrn);
}

@@ -544,7 +544,7 @@ I830SubsequentScreenToScreenCopy(ScrnInf
ADVANCE_LP_RING();
}

- if (IS_I965G(pI830))
+ if (IS_I96X(pI830))
I830EmitFlush(pScrn);
}

@@ -628,7 +628,7 @@ I830SubsequentMono8x8PatternFillRect(Scr
ADVANCE_LP_RING();
}

- if (IS_I965G(pI830))
+ if (IS_I96X(pI830))
I830EmitFlush(pScrn);
}

@@ -753,7 +753,7 @@ I830SubsequentColorExpandScanline(ScrnIn
pI830->BR[9] += pScrn->displayWidth * pI830->cpp;
I830GetNextScanlineColorExpandBuffer(pScrn);

- if (IS_I965G(pI830))
+ if (IS_I96X(pI830))
I830EmitFlush(pScrn);
}

Index: xenocara/driver/xf86-video-intel/src/i830_dga.c
================================================== =================
RCS file: /cvs/xenocara/driver/xf86-video-intel/src/i830_dga.c,v
retrieving revision 1.1.1.1
diff -u -p -r1.1.1.1 i830_dga.c
--- xenocara/driver/xf86-video-intel/src/i830_dga.c 26 Nov 2006 20:06:46 -0000 1.1.1.1
+++ xenocara/driver/xf86-video-intel/src/i830_dga.c 26 Jul 2007 10:38:27 -0000
@@ -286,7 +286,7 @@ I830_Sync(ScrnInfoPtr pScrn)
if (pI830->noAccel)
return;

- if (IS_I965G(pI830))
+ if (IS_I96X(pI830))
flags = 0;

BEGIN_LP_RING(2);
Index: xenocara/driver/xf86-video-intel/src/i830_dri.c
================================================== =================
RCS file: /cvs/xenocara/driver/xf86-video-intel/src/i830_dri.c,v
retrieving revision 1.1.1.2
diff -u -p -r1.1.1.2 i830_dri.c
--- xenocara/driver/xf86-video-intel/src/i830_dri.c 16 Dec 2006 21:02:00 -0000 1.1.1.2
+++ xenocara/driver/xf86-video-intel/src/i830_dri.c 26 Jul 2007 10:38:28 -0000
@@ -481,7 +481,7 @@ I830DRIScreenInit(ScreenPtr pScreen)
pI830->LockHeld = 0;

pDRIInfo->drmDriverName = I830KernelDriverName;
- if (IS_I965G(pI830))
+ if (IS_I96X(pI830))
pDRIInfo->clientDriverName = I965ClientDriverName;
else
pDRIInfo->clientDriverName = I830ClientDriverName;
@@ -684,10 +684,10 @@ I830DRIMapScreenRegions(ScrnInfoPtr pScr
pScrn->virtualY * pI830->cpp);
#endif

- /* The I965G isn't ready for the front buffer mapping to be moved around,
+ /* The I965 isn't ready for the front buffer mapping to be moved around,
* because of issues with rmmap, it seems.
*/
- if (!IS_I965G(pI830)) {
+ if (!IS_I96X(pI830)) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"[drm] Mapping front buffer\n");
if (drmAddMap(pI830->drmSubFD,
@@ -1232,7 +1232,7 @@ I830DRIMoveBuffers(WindowPtr pParent, DD

I830SelectBuffer(pScrn, I830_SELECT_BACK);
I830SubsequentScreenToScreenCopy(pScrn, x1, y1, destx, desty, w, h);
- if (!IS_I965G(pI830)) {
+ if (!IS_I96X(pI830)) {
I830SelectBuffer(pScrn, I830_SELECT_DEPTH);
I830SubsequentScreenToScreenCopy(pScrn, x1, y1, destx, desty, w, h);
}
Index: xenocara/driver/xf86-video-intel/src/i830_driver.c
================================================== =================
RCS file: /cvs/xenocara/driver/xf86-video-intel/src/i830_driver.c,v
retrieving revision 1.1.1.3
diff -u -p -r1.1.1.3 i830_driver.c
--- xenocara/driver/xf86-video-intel/src/i830_driver.c 3 Mar 2007 09:49:32 -0000 1.1.1.3
+++ xenocara/driver/xf86-video-intel/src/i830_driver.c 26 Jul 2007 10:38:34 -0000
@@ -220,6 +220,7 @@ static SymTabRec I830BIOSChipsets[] = {
{PCI_CHIP_I965_G_1, "965G"},
{PCI_CHIP_I965_Q, "965Q"},
{PCI_CHIP_I946_GZ, "946GZ"},
+ {PCI_CHIP_I965_GM, "965GM"},
{-1, NULL}
};

@@ -237,6 +238,7 @@ static PciChipsets I830BIOSPciChipsets[]
{PCI_CHIP_I965_G_1, PCI_CHIP_I965_G_1, RES_SHARED_VGA},
{PCI_CHIP_I965_Q, PCI_CHIP_I965_Q, RES_SHARED_VGA},
{PCI_CHIP_I946_GZ, PCI_CHIP_I946_GZ, RES_SHARED_VGA},
+ {PCI_CHIP_I965_GM, PCI_CHIP_I965_GM, RES_SHARED_VGA},
{-1, -1, RES_UNDEFINED}
};

@@ -3109,7 +3111,7 @@ I830DetectMemory(ScrnInfoPtr pScrn)

/* We need to reduce the stolen size, by the GTT and the popup.
* The GTT varying according the the FbMapSize and the popup is 4KB. */
- if (IS_I965G(pI830))
+ if (IS_I96X(pI830))
range = 512 + 4; /* Fixed 512KB size for i965 */
else
range = (pI830->FbMapSize / MB(1)) + 4;
@@ -3631,7 +3633,7 @@ I830LoadPalette(ScrnInfoPtr pScrn, int n
OUTREG(dspbase, INREG(dspbase));
OUTREG(dspreg, temp | DISPPLANE_GAMMA_ENABLE);
OUTREG(dspbase, INREG(dspbase));
- if (IS_I965G(pI830))
+ if (IS_I96X(pI830))
OUTREG(dspsurf, INREG(dspsurf));

/* It seems that an initial read is needed. */
@@ -4076,6 +4078,9 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int f
case PCI_CHIP_I946_GZ:
chipname = "946GZ";
break;
+ case PCI_CHIP_I965_GM:
+ chipname = "965GM";
+ break;
default:
chipname = "unknown chipset";
break;
@@ -4186,14 +4191,12 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int f
pI830->FbMapSize = 0x4000000; /* 64MB - has this been tested ?? */
}
} else {
- if (IS_I9XX(pI830)) {
+ if (IS_I9XX(pI830) && !IS_I965GM(pI830) &&
+ pI830->PciInfo->chipType != PCI_CHIP_E7221_G) {
if (pI830->PciInfo->memBase[2] & 0x08000000)
pI830->FbMapSize = 0x8000000; /* 128MB aperture */
else
pI830->FbMapSize = 0x10000000; /* 256MB aperture */
-
- if (pI830->PciInfo->chipType == PCI_CHIP_E7221_G)
- pI830->FbMapSize = 0x8000000; /* 128MB aperture */
} else
/* 128MB aperture for later chips */
pI830->FbMapSize = 0x8000000;
@@ -4280,7 +4283,7 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int f
if (!pI830->directRenderingDisabled) {
Bool tmp = FALSE;

- if (IS_I965G(pI830))
+ if (IS_I96X(pI830))
pI830->mmModeFlags |= I830_KERNEL_TEX;

from = X_PROBED;
@@ -4970,7 +4973,7 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int f
else
pI830->CursorNeedsPhysical = FALSE;

- if (IS_I965G(pI830))
+ if (IS_I96X(pI830))
pI830->CursorNeedsPhysical = FALSE;

/* Force ring buffer to be in low memory for all chipsets */
@@ -5729,7 +5732,7 @@ CheckInheritedState(ScrnInfoPtr pScrn)

#if 0
if (errors) {
- if (IS_I965G(pI830))
+ if (IS_I96X(pI830))
I965PrintErrorState(pScrn);
else
I830PrintErrorState(pScrn);
@@ -5763,7 +5766,7 @@ ResetState(ScrnInfoPtr pScrn, Bool flush
pI830->entityPrivate->RingRunning = 0;

/* Reset the fence registers to 0 */
- if (IS_I965G(pI830)) {
+ if (IS_I96X(pI830)) {
for (i = 0; i < FENCE_NEW_NR; i++) {
OUTREG(FENCE_NEW + i * 8, 0);
OUTREG(FENCE_NEW + 4 + i * 8, 0);
@@ -5801,7 +5804,7 @@ SetFenceRegs(ScrnInfoPtr pScrn)

if (!I830IsPrimary(pScrn)) return;

- if (IS_I965G(pI830)) {
+ if (IS_I96X(pI830)) {
for (i = 0; i < FENCE_NEW_NR; i++) {
OUTREG(FENCE_NEW + i * 8, pI830->ModeReg.Fence[i]);
OUTREG(FENCE_NEW + 4 + i * 8, pI830->ModeReg.Fence[i+FENCE_NEW_NR]);
@@ -5917,7 +5920,7 @@ SaveHWState(ScrnInfoPtr pScrn)

pVesa = pI830->vesa;

- if (IS_I965G(pI830)) {
+ if (IS_I96X(pI830)) {
pI830->savedAsurf = INREG(DSPASURF);
pI830->savedBsurf = INREG(DSPBSURF);
}
@@ -6032,7 +6035,7 @@ RestoreHWState(ScrnInfoPtr pScrn)

VBESetDisplayStart(pVbe, pVesa->x, pVesa->y, TRUE);

- if (IS_I965G(pI830)) {
+ if (IS_I96X(pI830)) {
OUTREG(DSPASURF, pI830->savedAsurf);
OUTREG(DSPBSURF, pI830->savedBsurf);
}
@@ -6307,7 +6310,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, Displ
}

#if 0
- { /* I965G ENABLE TILING */
+ { /* I96X ENABLE TILING */
planeA = INREG(DSPACNTR) | 1<<10;
OUTREG(DSPACNTR, planeA);
/* flush the change. */
@@ -6315,7 +6318,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, Displ
OUTREG(DSPABASE, temp);
}
#else
- { /* I965G DISABLE TILING */
+ { /* I96X DISABLE TILING */
planeA = INREG(DSPACNTR) & ~1<<10;
OUTREG(DSPACNTR, planeA);
/* flush the change. */
@@ -6384,7 +6387,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, Displ
/* flush the change. */
temp = INREG(DSPABASE);
OUTREG(DSPABASE, temp);
- if (IS_I965G(pI830)) {
+ if (IS_I96X(pI830)) {
temp = INREG(DSPASURF);
OUTREG(DSPASURF, temp);
}
@@ -6398,7 +6401,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, Displ
/* flush the change. */
temp = INREG(DSPBADDR);
OUTREG(DSPBADDR, temp);
- if (IS_I965G(pI830)) {
+ if (IS_I96X(pI830)) {
temp = INREG(DSPBSURF);
OUTREG(DSPBSURF, temp);
}
@@ -6448,7 +6451,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, Displ
/* Trigger update */
temp = INREG(basereg);
OUTREG(basereg, temp);
- if (IS_I965G(pI830)) {
+ if (IS_I96X(pI830)) {
temp = INREG(surfreg);
OUTREG(surfreg, temp);
}
@@ -6471,7 +6474,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, Displ
/* Trigger update */
temp = INREG(basereg);
OUTREG(basereg, temp);
- if (IS_I965G(pI830)) {
+ if (IS_I96X(pI830)) {
temp = INREG(surfreg);
OUTREG(surfreg, temp);
}
@@ -6495,7 +6498,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, Displ
/* Trigger update */
temp = INREG(basereg);
OUTREG(basereg, temp);
- if (IS_I965G(pI830)) {
+ if (IS_I96X(pI830)) {
temp = INREG(surfreg);
OUTREG(surfreg, temp);
}
@@ -6516,7 +6519,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, Displ
/* Trigger update */
temp = INREG(basereg);
OUTREG(basereg, temp);
- if (IS_I965G(pI830)) {
+ if (IS_I96X(pI830)) {
temp = INREG(surfreg);
OUTREG(surfreg, temp);
}
@@ -6557,7 +6560,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, Displ
/* Trigger update */
temp = INREG(basereg);
OUTREG(basereg, temp);
- if (IS_I965G(pI830)) {
+ if (IS_I96X(pI830)) {
temp = INREG(surfreg);
OUTREG(surfreg, temp);
}
@@ -6664,7 +6667,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, Displ
#endif

#if 0
- if (IS_I965G(pI830))
+ if (IS_I96X(pI830))
I965PrintErrorState(pScrn);
else
I830PrintErrorState(pScrn);
@@ -7103,7 +7106,7 @@ IntelEmitInvarientState(ScrnInfoPtr pScr
ADVANCE_LP_RING();
}

- if (!IS_I965G(pI830))
+ if (!IS_I96X(pI830))
{
if (IS_I9XX(pI830))
I915EmitInvarientState(pScrn);
@@ -7635,8 +7638,8 @@ I830BIOSScreenInit(int scrnIndex, Screen
xf86DisableRandR(); /* Disable built-in RandR extension */
shadowSetup(pScreen);
/* support all rotations */
- if (IS_I965G(pI830)) {
- I830RandRInit(pScreen, RR_Rotate_0); /* only 0 degrees for I965G */
+ if (IS_I96X(pI830)) {
+ I830RandRInit(pScreen, RR_Rotate_0); /* only 0 degrees for I96X */
} else {
I830RandRInit(pScreen, RR_Rotate_0 | RR_Rotate_90 | RR_Rotate_180 | RR_Rotate_270);
}
@@ -7659,7 +7662,7 @@ I830BIOSScreenInit(int scrnIndex, Screen
I830_dump_registers(pScrn);
#endif

- if (IS_I965G(pI830)) {
+ if (IS_I96X(pI830)) {
/* turn off clock gating */
#if 0
OUTREG(0x6204, 0x70804000);
@@ -7795,14 +7798,14 @@ I830AdjustFrame(int scrnIndex, int x, in

if (pI830->Clone) {
if (!pI830->pipe == 0) {
- if (!IS_I965G(pI830)) {
+ if (!IS_I96X(pI830)) {
OUTREG(DSPABASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
} else {
OUTREG(DSPABASE, 0);
OUTREG(DSPASURF, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
}
} else {
- if (!IS_I965G(pI830)) {
+ if (!IS_I96X(pI830)) {
OUTREG(DSPBBASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
} else {
OUTREG(DSPBBASE, 0);
@@ -7812,14 +7815,14 @@ I830AdjustFrame(int scrnIndex, int x, in
}

if (pI830->pipe == 0) {
- if (!IS_I965G(pI830)) {
+ if (!IS_I96X(pI830)) {
OUTREG(DSPABASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
} else {
OUTREG(DSPABASE, 0);
OUTREG(DSPASURF, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
}
} else {
- if (!IS_I965G(pI830)) {
+ if (!IS_I96X(pI830)) {
OUTREG(DSPBBASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
} else {
OUTREG(DSPBBASE, 0);
@@ -8428,7 +8431,7 @@ I830BIOSSwitchMode(int scrnIndex, Displa
*/
if ( (!WindowTable[pScrn->scrnIndex] || pspix->devPrivate.ptr == NULL) &&
!pI830->DGAactive && (pScrn->PointerMoved == I830PointerMoved) &&
- !IS_I965G(pI830)) {
+ !IS_I96X(pI830)) {
if (!I830Rotate(pScrn, mode))
ret = FALSE;
}
@@ -8494,7 +8497,7 @@ I830BIOSSaveScreen(ScreenPtr pScreen, in
/* Flush changes */
temp = INREG(base);
OUTREG(base, temp);
- if (IS_I965G(pI830)) {
+ if (IS_I96X(pI830)) {
temp = INREG(surf);
OUTREG(surf, temp);
}
@@ -8967,7 +8970,7 @@ I830CheckDevicesTimer(OsTimerPtr timer,
offset = pI8301->FrontBuffer2.Start + ((pScrn->frameY0 * pI830->displayWidth + pScrn->frameX0) * pI830->cpp);
}

- if (IS_I965G(pI830)) {
+ if (IS_I96X(pI830)) {
if (pI830->pipe == 0)
adjust = INREG(DSPASURF);
else
Index: xenocara/driver/xf86-video-intel/src/i830_memory.c
================================================== =================
RCS file: /cvs/xenocara/driver/xf86-video-intel/src/i830_memory.c,v
retrieving revision 1.1.1.2
diff -u -p -r1.1.1.2 i830_memory.c
--- xenocara/driver/xf86-video-intel/src/i830_memory.c 16 Dec 2006 21:01:43 -0000 1.1.1.2
+++ xenocara/driver/xf86-video-intel/src/i830_memory.c 26 Jul 2007 10:38:36 -0000
@@ -1706,7 +1706,7 @@ MakeTiles(ScrnInfoPtr pScrn, I830MemRang

pitch = pScrn->displayWidth * pI830->cpp;

- if (IS_I965G(pI830)) {
+ if (IS_I96X(pI830)) {
I830RegPtr i830Reg = &pI830->ModeReg;

switch (fence) {
Index: xenocara/driver/xf86-video-intel/src/i830_video.c
================================================== =================
RCS file: /cvs/xenocara/driver/xf86-video-intel/src/i830_video.c,v
retrieving revision 1.1.1.2
diff -u -p -r1.1.1.2 i830_video.c
--- xenocara/driver/xf86-video-intel/src/i830_video.c 16 Dec 2006 21:02:03 -0000 1.1.1.2
+++ xenocara/driver/xf86-video-intel/src/i830_video.c 26 Jul 2007 10:38:48 -0000
@@ -171,7 +171,7 @@ Edummy(const char *dummy, ...)
OUT_RING(MI_NOOP); \
OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_CONTINUE); \
} \
- if (IS_I965G(pI830)) \
+ if (IS_I96X(pI830)) \
OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \
else \
OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \
@@ -189,7 +189,7 @@ Edummy(const char *dummy, ...)
OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE); \
OUT_RING(MI_NOOP); \
OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_OFF); \
- if (IS_I965G(pI830)) \
+ if (IS_I96X(pI830)) \
OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \
else \
OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \
@@ -446,7 +446,7 @@ I830InitVideo(ScreenPtr pScreen)
xvContrast = MAKE_ATOM("XV_CONTRAST");

/* Set up overlay video if we can do it at this depth. */
- if (!IS_I965G(pI830) && pScrn->bitsPerPixel != 8) {
+ if (!IS_I96X(pI830) && pScrn->bitsPerPixel != 8) {
overlayAdaptor = I830SetupImageVideoOverlay(pScreen);
if (overlayAdaptor != NULL) {
adaptors[num_adaptors++] = overlayAdaptor;
@@ -461,7 +461,7 @@ I830InitVideo(ScreenPtr pScreen)
/* Set up textured video if we can do it at this depth and we are on
* supported hardware.
*/
- if (pScrn->bitsPerPixel >= 16 && (IS_I9XX(pI830) || IS_I965G(pI830))) {
+ if (pScrn->bitsPerPixel >= 16 && (IS_I9XX(pI830) || IS_I96X(pI830))) {
texturedAdaptor = I830SetupImageVideoTextured(pScreen);
if (texturedAdaptor != NULL) {
adaptors[num_adaptors++] = texturedAdaptor;
@@ -1847,7 +1847,7 @@ I830DisplayVideo(ScrnInfoPtr pScrn, int
dstBox->x2, dstBox->y2);

/* buffer locations */
- if (IS_I965G(pI830))
+ if (IS_I96X(pI830))
{
overlay->OBUF_0Y = 0;
overlay->OBUF_0U = 0;
@@ -2995,7 +2995,7 @@ I830PutImage(ScrnInfoPtr pScrn,
if (pPriv->textured) {
pitchAlignMask = 3;
} else {
- if (IS_I965G(pI830))
+ if (IS_I96X(pI830))
pitchAlignMask = 255;
else
pitchAlignMask = 63;
@@ -3031,7 +3031,7 @@ I830PutImage(ScrnInfoPtr pScrn,
ErrorF("srcPitch: %d, dstPitch: %d, size: %d\n", srcPitch, dstPitch, size);
#endif

- if (IS_I965G(pI830))
+ if (IS_I96X(pI830))
extraLinear = BRW_LINEAR_EXTRA;
else
extraLinear = 0;
@@ -3145,7 +3145,7 @@ I830PutImage(ScrnInfoPtr pScrn,

I830DisplayVideo(pScrn, destId, width, height, dstPitch,
x1, y1, x2, y2, &dstBox, src_w, src_h, drw_w, drw_h);
- } else if (IS_I965G(pI830)) {
+ } else if (IS_I96X(pI830)) {
BroadwaterDisplayVideoTextured (pScrn, pPriv, destId, clipBoxes, width, height,
dstPitch, x1, y1, x2, y2,
src_w, src_h, drw_w, drw_h, pDraw);
@@ -3619,7 +3619,7 @@ I830VideoSwitchModeAfter(ScrnInfoPtr pSc
}
}

- if (!IS_I965G(pI830)) {
+ if (!IS_I96X(pI830)) {
if (pPriv->pipe == 0) {
if (INREG(PIPEACONF) & PIPEACONF_DOUBLE_WIDE) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,