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On Tue, Mar 20, 2007 at 10:29:42AM -0400, Gordon Willem Klok wrote:
> > Updated patch is:
> > http://stsp.in-berlin.de/piixpcib/pi...7-03-20_3.diff
> More people will test the diff if you send it inline


Index: share/man/man4/man4.i386/Makefile
================================================== =================
RCS file: /cvs/src/share/man/man4/man4.i386/Makefile,v
retrieving revision 1.59
diff -u -u -r1.59 Makefile
--- share/man/man4/man4.i386/Makefile 27 Oct 2006 17:10:48 -0000 1.59
+++ share/man/man4/man4.i386/Makefile 20 Mar 2007 13:34:05 -0000
@@ -6,7 +6,7 @@
geodesc.4 glxsb.4 gscpcib.4 gscpm.4 gus.4 ie.4 \
ichpcib.4 intro.4 ioapic.4 \
joy.4 le.4 lms.4 mcd.4 mem.4 mms.4 mtrr.4 npx.4 nvram.4 pas.4 \
- pcibios.4 pctr.4 pss.4 sb.4 \
+ pcibios.4 pctr.4 piixpcib.4 pss.4 sb.4 \
sea.4 uha.4 wds.4 wdt.4 wss.4 wt.4

MLINKS+= mem.4 kmem.4
Index: share/man/man4/man4.i386/piixpcib.4
================================================== =================
RCS file: share/man/man4/man4.i386/piixpcib.4
diff -N share/man/man4/man4.i386/piixpcib.4
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ share/man/man4/man4.i386/piixpcib.4 20 Mar 2007 13:34:05 -0000
@@ -0,0 +1,70 @@
+.\" $OpenBSD$
+.\" $OpenBSD: ichpcib.4,v 1.7 2006/08/06 02:10:16 brad Exp $
+.\"
+.\" Copyright (c) 2007 Stefan Sperling <stsp@stsp.in-berlin.de>
+.\" Copyright (c) 2004 Alexander Yurchenko <grange@openbsd.org>
+.\"
+.\" Permission to use, copy, modify, and distribute this software for any
+.\" purpose with or without fee is hereby granted, provided that the above
+.\" copyright notice and this permission notice appear in all copies.
+.\"
+.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+.\"
+.Dd March 20, 2007
+.Dt PIIXPCIB 4 i386
+.Os
+.Sh NAME
+.Nm piixpcib
+.Nd Intel PIIX4 ISA bridges
+.Sh SYNOPSIS
+.Cd "piixpcib* at pci?"
+.Cd "isa* at piixpcib?"
+.Sh DESCRIPTION
+The
+.Nm
+driver supports Intel
+.Tn 82371AB
+and
+.Tn 82440MX
+PIIX4 ISA bridges.
+
+Besides the core
+.Xr pcib 4
+functionality, the
+.Nm
+driver provides support for the Intel SpeedStep SMI technology
+present in some Pentium III CPUs.
+It allows the user to manually control CPU frequency with the
+.Xr sysctl 8
+program.
+The
+.Xr apmd 8
+daemon can be used to automatically control CPU frequency.
+SpeedStep SMI provides two CPU power states, low and high.
+The driver will switch the CPU into low power state if the
+hw.setperf sysctl is smaller or equal 50, and into high
+power state if hw.setperf is greater 50.
+.Sh SEE ALSO
+.Xr cpu 4 ,
+.Xr intro 4 ,
+.Xr isa 4 ,
+.Xr pci 4 ,
+.Xr pcib 4 ,
+.Xr sysctl 8 ,
+.Xr apmd 8
+.Sh HISTORY
+The
+.Nm
+driver first appeared in
+.Ox 4.2 .
+.Sh AUTHORS
+The
+.Nm
+driver was written by
+.An Stefan Sperling Aq stsp@stsp.in-berlin.de .
Index: sys/arch/i386/conf/files.i386
================================================== =================
RCS file: /cvs/src/sys/arch/i386/conf/files.i386,v
retrieving revision 1.154
diff -u -u -r1.154 files.i386
--- sys/arch/i386/conf/files.i386 20 Feb 2007 21:15:01 -0000 1.154
+++ sys/arch/i386/conf/files.i386 20 Mar 2007 13:34:05 -0000
@@ -136,12 +136,17 @@
# PCI-ISA bridge chipsets
device pcib: isabus
attach pcib at pci
-file arch/i386/pci/pcib.c pcib | ichpcib | gscpcib
+file arch/i386/pci/pcib.c pcib | ichpcib | gscpcib | piixpcib

# Intel ICHx/ICHx-M LPC bridges
device ichpcib: isabus
attach ichpcib at pci
file arch/i386/pci/ichpcib.c ichpcib
+
+# Intel PIIX4 PCI-ISA bridges
+device piixpcib: isabus
+attach piixpcib at pci
+file arch/i386/pci/piixpcib.c piixpcib & i686_cpu

# National Semiconductor Geode SC1100 PCI-ISA bridge
device gscpcib: isabus, gpiobus
Index: sys/arch/i386/pci/piixpcib.c
================================================== =================
RCS file: sys/arch/i386/pci/piixpcib.c
diff -N sys/arch/i386/pci/piixpcib.c
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ sys/arch/i386/pci/piixpcib.c 20 Mar 2007 13:34:05 -0000
@@ -0,0 +1,373 @@
+/* $OpenBSD$ */
+/* $OpenBSD: ichpcib.c,v 1.16 2006/12/12 23:14:27 dim Exp $ */
+
+/*
+ * Copyright (c) 2007 Stefan Sperling <stsp@stsp.in-berlin.de>
+ *
+ * Copyright (c) 2004 Alexander Yurchenko <grange@openbsd.org>
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/* Some code taken from: */
+/* $NetBSD: piixpcib.c,v 1.10 2006/11/16 01:32:39 christos Exp $ */
+/*-
+ * Copyright (c) 2004, 2006 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Minoura Makoto, Matthew R. Green, and Jared D. McNeill.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Special driver for the Intel PIIX4 bridges that attaches
+ * instead of pcib(4). In addition to the core pcib(4) functionality this
+ * driver provides support for Intel SpeedStep SMI technology present in
+ * some Pentium III CPUs.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/sysctl.h>
+
+#include <machine/bus.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcidevs.h>
+
+#include <machine/cpu.h>
+#include <machine/cpufunc.h>
+#include <machine/kvm86.h>
+
+/* 0x47534943 == "ISGE" ('Intel Speedstep Gate E') */
+#define PIIXPCIB_ISGE 0x47534943
+#define PIIXPCIB_GETSTATE 1
+#define PIIXPCIB_SETSTATE 2
+
+#define PIIXPCIB_SPEEDSTEP_HIGH 0
+#define PIIXPCIB_SPEEDSTEP_LOW 1
+
+struct piixpcib_softc {
+ struct device sc_dev;
+
+ int sc_smi_port;
+ int sc_smi_data;
+ int sc_command;
+ int sc_flags;
+
+ int state;
+};
+
+int piixpcib_match(struct device *, void *, void *);
+void piixpcib_attach(struct device *, struct device *, void *);
+
+void piixpcib_setperf(int);
+int piixpcib_cpuspeed(int *);
+
+static int piixpcib_set_ownership(struct piixpcib_softc *);
+static int piixpcib_configure_speedstep(struct piixpcib_softc *);
+static int piixpcib_getset_state(struct piixpcib_softc *, int *, int);
+
+/* arch/i386/pci/pcib.c */
+void pcibattach(struct device *, struct device *, void *);
+
+/* arch/i386/i386/machdep.c */
+void p3_update_cpuspeed(void);
+
+struct cfattach piixpcib_ca = {
+ sizeof(struct piixpcib_softc),
+ piixpcib_match,
+ piixpcib_attach
+};
+
+struct cfdriver piixpcib_cd = {
+ NULL, "piixpcib", DV_DULL
+};
+
+static void *speedstep_cookie;
+extern int setperf_prio;
+
+const struct pci_matchid piixpcib_devices[] = {
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371AB_ISA}, /* PIIX4 */
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82440MX_PM}, /* PIIX4 in MX440 */
+};
+
+static void
+piixpcib_int15_gsic_call(int *sig, int *smiport, int *cmd, int *smidata,
+ int *flags)
+{
+ struct kvm86regs regs;
+
+ memset(&regs, 0, sizeof(struct kvm86regs));
+ regs.eax = 0x0000e980; /* IST support */
+ regs.edx = PIIXPCIB_ISGE;
+ kvm86_simplecall(0x15, &regs);
+
+ if (regs.eax == PIIXPCIB_ISGE) {
+ *sig = regs.eax;
+ *smiport = regs.ebx & 0xff;
+ *cmd = (regs.ebx >> 16) & 0xff;
+ *smidata = regs.ecx;
+ *flags = regs.edx;
+ } else
+ *sig = *smiport = *cmd = *smidata = -1;
+
+ return;
+}
+
+static int
+piixpcib_set_ownership(struct piixpcib_softc *sc)
+{
+ int rv;
+ paddr_t pmagic;
+ static char magic[] = "Copyright (c) 1999 Intel Corporation";
+
+ pmagic = vtophys((vaddr_t)magic);
+
+ __asm __volatile(
+ "movl $0, %%edi\n\t"
+ "out %%al, (%%dx)\n"
+ : "=D" (rv)
+ : "a" (sc->sc_command),
+ "b" (0),
+ "c" (0),
+ "d" (sc->sc_smi_port),
+ "S" (pmagic)
+ );
+
+ return (rv ? ENXIO : 0);
+}
+
+static int
+piixpcib_configure_speedstep(struct piixpcib_softc *sc)
+{
+ int sig, smiport, cmd, smidata, flags;
+ int rv;
+
+ piixpcib_int15_gsic_call(&sig, &smiport, &cmd, &smidata, &flags);
+
+ /* setup some defaults */
+ sc->sc_smi_port = 0xb2;
+ sc->sc_smi_data = 0xb3;
+ sc->sc_command = 0x47534982;
+ sc->sc_flags = 0;
+
+ if (sig == PIIXPCIB_ISGE) {
+ sc->sc_smi_port = smiport;
+ sc->sc_smi_data = smidata;
+ if (cmd == 0x80)
+ /* GSIC returned cmd 0x80, should be 0x82 */
+ cmd = 0x82;
+ sc->sc_command = (sig & 0xffffff00) | (cmd & 0xff);
+ sc->sc_flags = flags;
+ } else {
+ /* Signature doesn't match, bail out. */
+ return ENODEV;
+ }
+
+ if (piixpcib_set_ownership(sc) != 0) {
+ printf(": unable to claim ownership from BIOS, "
+ "SpeedStep disabled");
+ return ENXIO;
+ }
+
+ rv = piixpcib_getset_state(sc, &sc->state, PIIXPCIB_GETSTATE);
+ if (rv != 0) {
+ printf(": cannot determine CPU power state, "
+ "SpeedStep disabled");
+ return ENXIO;
+ }
+
+ /* save the sc for IO tag/handle */
+ speedstep_cookie = sc;
+
+ return 0;
+}
+
+int
+piixpcib_match(struct device *parent, void *match, void *aux)
+{
+ if (pci_matchbyid((struct pci_attach_args *)aux, piixpcib_devices,
+ sizeof(piixpcib_devices) / sizeof(piixpcib_devices[0])))
+ return (2); /* supersede pcib(4) */
+ return (0);
+}
+
+void
+piixpcib_attach(struct device *parent, struct device *self, void *aux)
+{
+ struct piixpcib_softc *sc = (struct piixpcib_softc *)self;
+
+ /* Set up SpeedStep. */
+ if (piixpcib_configure_speedstep(sc) == 0) {
+ printf(": SpeedStep");
+
+ /* Hook into hw.setperf sysctl */
+ cpu_setperf = piixpcib_setperf;
+ cpu_cpuspeed = piixpcib_cpuspeed;
+ setperf_prio = 2;
+ }
+
+ /* Provide core pcib(4) functionality */
+ pcibattach(parent, self, aux);
+}
+
+static int
+piixpcib_getset_state(struct piixpcib_softc *sc, int *state, int function)
+{
+ int new_state;
+ int rv;
+ int eax;
+
+#ifdef DIAGNOSTIC
+ if (function != PIIXPCIB_GETSTATE &&
+ function != PIIXPCIB_SETSTATE) {
+ printf("%s: %s called with invalid function %d\n",
+ sc->sc_dev.dv_xname, __func__, function);
+ return EINVAL;
+ }
+#endif
+
+ __asm __volatile(
+ "movl $0, %%edi\n\t"
+ "out %%al, (%%dx)\n"
+ : "=a" (eax),
+ "=b" (new_state),
+ "=D" (rv)
+ : "a" (sc->sc_command),
+ "b" (function),
+ "c" (*state),
+ "d" (sc->sc_smi_port),
+ "S" (0)
+ );
+
+ *state = new_state & 1;
+
+ switch (function) {
+ case PIIXPCIB_GETSTATE:
+ if (eax)
+ return ENXIO;
+ break;
+ case PIIXPCIB_SETSTATE:
+ if (rv)
+ return ENXIO;
+ break;
+ }
+
+ return 0;
+}
+
+void
+piixpcib_setperf(int level)
+{
+ struct piixpcib_softc *sc;
+ int new_state;
+ int tries, rv, s;
+
+ sc = speedstep_cookie;
+
+#ifdef DIAGNOSTIC
+ if (sc == NULL) {
+ printf("%s: no cookie", __func__);
+ return;
+ }
+#endif
+
+ /* Only two states are available */
+ if (level <= 50)
+ new_state = PIIXPCIB_SPEEDSTEP_LOW;
+ else
+ new_state = PIIXPCIB_SPEEDSTEP_HIGH;
+
+ if (sc->state == new_state)
+ return;
+
+ tries = 5;
+ s = splhigh();
+
+ do {
+ rv = piixpcib_getset_state(sc, &new_state,
+ PIIXPCIB_SETSTATE);
+ if (rv)
+ delay(200);
+ } while (rv && --tries);
+
+ splx(s);
+
+#ifdef DIAGNOSTIC
+ if (rv)
+ printf("%s: setting CPU power state failed",
+ sc->sc_dev.dv_xname);
+#endif
+
+ sc->state = new_state;
+
+ /* Force update of hw.cpuspeed */
+ (void)piixpcib_cpuspeed(&cpuspeed);
+}
+
+int
+piixpcib_cpuspeed(int *speed)
+{
+ struct piixpcib_softc *sc;
+
+ sc = speedstep_cookie;
+
+#ifdef DIAGNOSTIC
+ if (sc == NULL) {
+ printf("%s: no cookie", __func__);
+ return ENXIO;
+ }
+#endif
+ /* XXX: SpeedStep is only present in Pentium III CPUs
+ * and we are lacking a reliable method to determine
+ * CPU freqs corresponding to low and high power state
+ * (and yes, I've tried it the way the Linux speedstep-smi
+ * driver does it, thank you very much).
+ * So call p3_update_cpuspeed() from arch/i386/i386/machdep.c
+ * and return its result. Works fine on my Thinkpad X21. */
+ p3_update_cpuspeed();
+
+ *speed = cpuspeed;
+ return 0;
+}


--
stefan
http://stsp.in-berlin.de PGP Key: 0xF59D25F0