This is a discussion on sk(4) interrupt moderation timing fix. within the mailing.openbsd.tech forums, part of the OpenBSD category; --> Here is a patch based on a patch from Jeff Rizzo on the NetBSD tech-net list which fixes the ...
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| Here is a patch based on a patch from Jeff Rizzo on the NetBSD tech-net list which fixes the interrupt moderation timer frequencies. Please try this out on any SysKonnect Yukon based boards currently supported by the sk(4) driver. Index: if_sk.c ================================================== ================= RCS file: /cvs/src/sys/dev/pci/if_sk.c,v retrieving revision 1.87 diff -u -p -r1.87 if_sk.c --- if_sk.c 15 Nov 2005 20:32:04 -0000 1.87 +++ if_sk.c 24 Nov 2005 15:24:45 -0000 @@ -1045,6 +1045,8 @@ skc_probe(struct device *parent, void *m */ void sk_reset(struct sk_softc *sc) { + u_int32_t sk_imtimer_ticks; + DPRINTFN(2, ("sk_reset\n")); CSR_WRITE_2(sc, SK_CSR, SK_CSR_SW_RESET); @@ -1076,17 +1078,28 @@ void sk_reset(struct sk_softc *sc) sk_win_write_4(sc, SK_RAMCTL, SK_RAMCTL_UNRESET); /* - * Configure interrupt moderation. The moderation timer + * Configure interrupt moderation. The moderation timer * defers interrupts specified in the interrupt moderation * timer mask based on the timeout specified in the interrupt * moderation timer init register. Each bit in the timer - * register represents 18.825ns, so to specify a timeout in - * microseconds, we have to multiply by 54. + * register represents one tick, so to specify a timeout in + * microseconds, we have to multiply by the correct number of + * ticks-per-microsecond. */ - sk_win_write_4(sc, SK_IMTIMERINIT, SK_IM_USECS(100)); - sk_win_write_4(sc, SK_IMMR, SK_ISR_TX1_S_EOF|SK_ISR_TX2_S_EOF| + switch (sc->sk_type) { + case SK_GENESIS: + sk_imtimer_ticks = SK_IMTIMER_TICKS_GENESIS; + break; + case SK_YUKON_EC: + sk_imtimer_ticks = SK_IMTIMER_TICKS_YUKON_EC; + break; + default: + sk_imtimer_ticks = SK_IMTIMER_TICKS_YUKON; + } + sk_win_write_4(sc, SK_IMTIMERINIT, SK_IM_USECS(100)); + sk_win_write_4(sc, SK_IMMR, SK_ISR_TX1_S_EOF|SK_ISR_TX2_S_EOF| SK_ISR_RX1_EOF|SK_ISR_RX2_EOF); - sk_win_write_1(sc, SK_IMTIMERCTL, SK_IMCTL_START); + sk_win_write_1(sc, SK_IMTIMERCTL, SK_IMCTL_START); } int Index: if_skreg.h ================================================== ================= RCS file: /cvs/src/sys/dev/pci/if_skreg.h,v retrieving revision 1.24 diff -u -p -r1.24 if_skreg.h --- if_skreg.h 15 Oct 2005 23:09:17 -0000 1.24 +++ if_skreg.h 24 Nov 2005 15:24:46 -0000 @@ -335,8 +335,11 @@ #define SK_IMCTL_STOP 0x02 #define SK_IMCTL_START 0x04 -#define SK_IMTIMER_TICKS 54 -#define SK_IM_USECS(x) ((x) * SK_IMTIMER_TICKS) +/* Number of ticks per usec for interrupt moderation */ +#define SK_IMTIMER_TICKS_GENESIS 54 +#define SK_IMTIMER_TICKS_YUKON 78 +#define SK_IMTIMER_TICKS_YUKON_EC 125 +#define SK_IM_USECS(x) ((x) * sk_imtimer_ticks) /* * The SK_EPROM0 register contains a byte that describes the |